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Timing and Race Condition Verification of Real-time Systems
Point of Contact Yann-Hang Lee
yhlee@asu.edu
Dates October 2002 - September 2003
Problem Real-time embedded systems differentiate themselves from computation-intensive applications by their concurrent threads of control and time-dependent operations. As NASA's space applications become more complex and timing constraints on control actions more stringent, the verification of temporal behavior of real-time software systems has become a great challenge. In this proposed project, we will investigate a novel approach to uncover all possible derivations of program execution and race conditions among multiple concurrent threads caused by different event arrival instances The approach is based on an integration of test analysis technique with timing measurement, scheduling, control-data flow analysis, and structured I/O models. The findings will enhance software verification tasks by identifying necessary timing patterns for testing and by eliminating those that are not required. They will also reveal all potential thread interaction sequences. As a result, the systems will be robust against unanticipated timing scenarios. To automate the proposed approach, a tool suite will be developed and the experiments with NASA space applications will be carried out.
Objective

The goals of the proposed project are to investigate techniques that support timing and race condition verification for real-time systems. We aim at high confidence embedded systems and plan to implement a tool suite to automate a test and verification process, as well as static and runtime analysis approaches. The objectives of the project are to design a temporal analysis mechanism that has the following attributes:

  • Through instrumentation and dynamic analysis of program execution, the temporal dependence between program behavior and the timing of event occurrences can be exposed, modeled, and evaluated.
  • To constitute an automated testing framework for effective application of timed test stimuli.
  • By adopting temporal interval logic, formal reprensentation of system behavior at implementation level of abstraction can be realized for verification of timing properties.

Particularly, the project is aimed to explore any potential execution derivations or race conditions when sequences of test events occur at various instances. Combined with execution trace and temporal interval logic analysis, alternate timing patterns can be generated to improve test coverage. In addition, comparisons of formal representations at implementation and at specification levels can be carried out for timing verification.

While we devise new efficient algorithms or adapt existing ones (that are complementary to the study we propose) for timing analysis, our main focus will be on integration and experiment for practical real-time systems. Experiment and validation in NASA's applications will be conducted such that we can identify practical implementation constraints, improve the flexibility of the proposed methodology, and measure the effectiveness of the research approaches. In addition, collaborations with other IV&V teams will be initiated for technology demonstration, discussion, and dissemination.

Results Research in analysis approaches for timing and race condition analysis.doc
Software development for timing measurement of interaction events.zip
A Comparative Study of Formal Methods for State Based Systems.doc
Report on proof-of-concept demonstration of the proposed approach.pdf
Keywords real-time systems, VxWorks, software faults, embedded systems
Categories Domain-Specific Analysis
Dynamic Analysis