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| Programmable Logic Device IV&V Research | |
| Point of Contact |
Michael Beims Michael.A.Beims@ivv.nasa.gov |
| Dates | July 2004 - September 2006 |
| Problem | The usage of Programmable Logic (PL) is becoming commonplace within NASA projects, facilities, and research. As part of this trend, Programmable Logic is seen more frequently in Space Systems' software undergoing Independent Validation and Verification (IV&V) at NASA's IV&V Facility. Programmable logic chips, such as Field Programmable Gate Arrays (FPGAs) are being employed to standardize functionality formerly performed by the Central Processing Unit (e.g. battery charging algorithms) and to create custom capabilities (e.g. science domain specific massively parallel data compression) within satellites and instrumentation. PL software is tested for functionality, boundary conditions, and operational simulation but most of this logic programming software is not subjected to verification and validation methods employed in main stream software. Existing methods such as Fagan and Gibbs inspection of software can be adapted to PL designs for use at the Design Review level as well as for Quality Assurance. At least one current NASA Space Systems appears to be a good candidate for use as a pilot project for Independent Verification and Validation of PL software due to significant reliance on PL devices for critical spacecraft control and critical science instrument functionality. |
| Objective | This research will focus specifically on FPGA's within the PL family and aims to identify design fault characteristics specific to the FPGA and then explore the feasibility of applying existing inspection methods (e.g. Fagan and Gibbs) that may be candidates for direct application to FPGA designs. Once a suitable set of methods has been identified, the research will result in the development of modifications to the design phase, peer and design review methodologies. Incorporating and to prototyping those methods will be done by providing Independent Verification and Validation in a NASA case study. |
| Results | No results are available at this time. Please check back again. |
| Keywords | Programmable Logic Devices, PLD, FPGA, Software Inspection, VHDL |
| Categories |
Code Analysis Design Analysis Domain-Specific Analysis Requirements Analysis Static Analysis |
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Curator: Josh Stonestreet NASA Official: Lisa Montgomery |
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